1. Field of the Invention
The present invention relates to a semiconductor element having external connection terminals, a method of manufacturing the semiconductor element, and a semiconductor device equipped with the semiconductor elements and, more particularly, a semiconductor element, a method of manufacturing the semiconductor element, and a semiconductor device, capable of reducing a placement area of external connection terminals on an integrated circuit mounting surface.
2. Description of the Prior Art
In general, a semiconductor device comprises a semiconductor element and a package in which the semiconductor device is mounted. On a surface of the semiconductor element are formed external connection terminals (electrodes) which connect electrically an integrated circuit formed on the semiconductor element to an external device placed on the outside of the package. Lead wirings are provided on the package. The external connection terminals of the semiconductor element and the lead wirings are electrically connected indirectly via wires formed by means of wire bonding technique or directly by wireless bonding technique.
As shown in FIG. 12, an optical element 1 such as an image sensor, a solid state imaging device, etc. in the prior art includes at least a photo detector 3 and external connection terminals 5 disposed in the neighboring area of the photo detector 3 on its surface. The photo detector 3 can execute so-called photoelectric conversion to convert optical signals into electric signals. Though not shown, peripheral circuits such as a CCD (Charge Coupled Device) which can transfer sequentially the electric signals derived by photoelectric conversion by use of the photo detector 3 are disposed around the photo detector 3. The external connection terminals 5 connect electrically the photo detector 3 and the external device (not shown).
As shown in FIG. 13, an optical device 10 comprise the optical element 1 and a package 12 in which the optical element 1 is mounted. A glass lid 14 which is able to transmit the optical signals is provided on the package 12. The optical device 10 can be hermetic-sealed by the glass lid 14 and the package 12.
As shown in FIGS. 13 and 14, the lead wirings 13 are formed in the outer periphery of the optical element 1 on the package 12. In the case that the wire bonding is employed, the external connection terminals 5 of the optical element 1 and the lead wirings 13 are connected electrically by bonding wires 9. The optical element 1 is bonded to the package 12 by die bonding technique.
With the high advance and complication of LSIs in recent years, there has been a tendency that the number of terminals required for the semiconductor element is increased. However, if the number of terminals are simply increased based on a layout rule for the external connection terminals on the semiconductor element in the prior art, an increase in an element area is brought about. In order to overcome this drawback, such a method can be considered that the increase in the element area should be avoided by reducing a distance between the external connection terminals respectively. In this case, the bonding technique with extremely high accuracy is requested since the distance between the external connection terminals must be narrowed rather than that in prior art.
FIG. 15 is a sectional view showing the wire bonding which is now applied to the optical element. The bonding wire 9 is pushed against the external connection terminal 5 by use of a capillary 15 and then bonded to the external connection terminal 5 in terms of ultrasonic vibration. However, in the optical element 1 shown in FIG. 12, the external connection terminals 5 are disposed closer to each other and in addition the photo detector 3 and the external connection terminal 5 are disposed closer to each other. As a result, there has been caused such a disadvantage that a part of a surface of the external connection terminal 5 is peeled off upon bonding and then such peelings fall to the photo detector 3 and then stick thereto as adhesive substance 16. In addition, unless enough bonding accuracy can be achieved, the capillary 15 does not abut upon the external connection terminal 5 exactly, but upon a protection film coated on the surface of the optical element 1. Therefore, there has been caused another disadvantage that a part of the protection film is peeled off and then such peeled films also fall to the photo detector 3 and then stick thereto as adhesive substance 16.
As shown in FIG. 16(A), in the case that, for example, the adhesive substance 16 falls to a pixel 3c out of a plurality of pixels 3a to 3e constituting the photo detector 3, there are some cases where a white level signal which should be output properly from the pixel 3c is converted into a black level signal, as shown in FIG. 16(B), when a light is incident into the photo detector 3. As a consequence, proper signal output values cannot be output from the photo detector 3.
In order to overcome the above disadvantages, a semiconductor element set forth in Patent Application Publication (KOKAI) 3-104246 has been proposed. FIG. 17 is a view showing a configuration of the semiconductor element 1a in the prior art. In this semiconductor element la, the external connection terminals are disposed on side surfaces of the semiconductor element 1a, so that an occupied area of the external connection terminals 5 on a surface of the semiconductor element 1a can be reduced, which results in reduction in the surface area of the semiconductor element 1a. In addition, if the semiconductor element set forth in the above Patent Application Publication (KOKAI) 3-104246 is applied to the above optical device 10, there has not been caused the disadvantage due to the adhesive substance 16 generated during wire bonding since the photo detector 3 and the external connection terminals 5 of the optical element 1 are formed on different surfaces of the optical element 1, as shown in FIG. 18.
Nevertheless, in the above semiconductor element 1a shown in FIG. 17, the external connection terminals 5 can be formed on the side surfaces of the semiconductor element 1a, but the electrical measuring electrodes 17 used to execute the electrical measurement of the integrated circuit in the course of production process (wafer process) is required separately. The electrical measuring electrodes 17 are arranged on the surface of the semiconductor element 1a as the integrated circuit mounting surface. The electrical measuring electrodes 17 and the external connection terminals 5 are connected electrically by the wirings 18 respectively, so that the external connection terminals 5 are connected electrically to the not shown integrated circuit in the semiconductor element 1a via the wirings 18 and the electrical measuring electrodes 17 respectively. In the optical device 10, the electrical measuring electrodes 17 as well as the photo detector 3 are arranged on the surface of the optical element 1 and the external connection terminals 5 are arranged on the side surfaces of the optical element 1. The occupied areas of the electrical measuring electrodes 17 are small rather than those of the external connection terminals 5. However, the occupied areas of the electrical measuring electrodes 17 are not so small as they can be neglected. For this reason, the element area of the optical element 1 cannot be sufficiently reduced because the electrical measuring electrodes 17 are required substantially as many as the external connection terminals 5.
In addition, the increase in the element area of the optical element 1 results in an increase in size of the package 12 and therefore the optical device 10 is enlarged in size.
The present invention has been made to overcome the above problems, and it is an object of the present invention to provide a semiconductor element capable of reducing an element area by reducing occupied areas of external connection terminals and electrical measuring electrodes used only in production processes. More particularly, it is an object of the present invention to provide an optical element capable of reducing an element area and also preventing degradation in characteristics due to adhesive substance being generated upon bonding.
It is another object of the present invention to provide a method of manufacturing a semiconductor element and, more particularly, a method of manufacturing an optical element capable of reducing the number of production process while achieving reduction in the element area.
It is still another object of the present invention to provide a semiconductor device capable of achieving reduction of the element area while reducing a size of a package to thus reduce a size of overall semiconductor device. More particularly, it is still another object of the present invention to provide an optical device capable of reducing a size of overall optical device.
In order to achieve the above object, according to a first aspect of the present invention, there is provided a semiconductor element comprising wirings formed on an integrated circuit mounting surface of a semiconductor chip to extend from an integrated circuit to end portions of the semiconductor chip; and external connection terminals connected to the wirings so as to connect electrically the integrated circuit and an external device arranged on an outside of the semiconductor chip, at least bonding areas of the external connection terminals being disposed only on side surfaces, a back surface, or both the side surfaces and the back surface of the semiconductor chip. The wirings are disconnected from electrical measuring electrodes which are formed on dicing lines and then connected to the external connection terminals. The wirings being extended up to an end portion of the semiconductor chip and the external connection terminals are connected electrically by terminal wiring connection members which are formed integrally with the external connection terminals and are extended from the side surface or the back surface of the semiconductor chip to the integrated circuit mounting surface respectively. The external connection terminals and the terminal wiring connection members are formed of same conductive plate material respectively. The wirings being extended up to an end portion of the semiconductor chip and the external connection terminals are connected electrically by terminal wiring connection members which are formed of material different from those of the external connection terminals and the wirings, and are extended from the side surface or the back surface of the semiconductor chip to the integrated circuit mounting surface respectively. Preferably the external connection terminals are formed of either gold bump electrodes or electrodes which are formed with use of a TAB (Tape Automated Bonding) technique. The external connection terminals are disposed on the side surfaces or the back surface of the semiconductor chip via an insulator. It is preferable that the semiconductor element further comprises a CCD (Charge Coupled Device) provided in the integrated circuit.
With the above configuration, in the semiconductor element, basically the external connection terminals are disposed only on the side surfaces, the back surface, or both the side surfaces and the back surface of the semiconductor chip. In more detail, at least bonding areas of the external connection terminals are disposed only on side surfaces, a back surface, or both the side surfaces and the back surface of the semiconductor chip. The electrical measuring electrodes used to measure electric characteristics of the integrated circuit are disposed on the dicing lines to be connected to the wirings, and then removed by dicing process after the electrical measurement (characteristic evaluation test) has been completed, so that the electrical measuring electrodes are disconnected from the wirings. The external connection terminals are connected electrically to the wirings from which the electrical measuring electrodes have been disconnected. As a consequence, the external connection terminals can be formed on the side surfaces or the back surface of the semiconductor chip. In addition, only the integrated circuit and the wirings are formed on the integrated circuit mounting surface of the semiconductor element, but the electrical measuring electrodes are not formed on the integrated circuit mounting surface of the semiconductor element. For this reason, the element surface area of the semiconductor element can be reduced.
Besides, in the case that the semiconductor element consists of the optical element which has the photo detector and the CCD in the integrated circuit, the photo detector and the external connection terminals can be formed on different surfaces of the semiconductor element respectively and therefore adhesive substance which is generated upon bonding and dropped down onto the photo detector can be lessened. For this reason, degradation in characteristics of the photo detector due to such adhesive substance can be prevented while reducing the element area.
Further, the wirings and the external connection terminals can be connected simply by the terminal wiring connection members.
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor element comprising the steps of forming, on a surface of a semiconductor wafer, a plurality of semiconductor elements having integrated circuits therein respectively, electrical measuring electrodes arranged on dicing lines between the semiconductor elements, for measuring electric characteristics of each integrated circuit in each semiconductor element, and wirings for connecting electrically the integrated circuits and the electrical measuring electrodes; executing electrical measurement of the integrated circuits provided in the semiconductor elements by use of the electrical measuring electrodes; dividing the semiconductor wafer into individual semiconductor elements along the dicing lines and simultaneously removing the electrical measuring electrodes from the semiconductor elements; and forming external connection terminals on side surfaces or a back surface or both the side surfaces and the back surface of the semiconductor element to be electrically connected to the wirings from which the electrical measuring electrodes are removed. It is preferable that basically the electrical measuring electrodes and the wirings are formed as an identical wiring layer. Like the above, it is preferable that the semiconductor element comprises the photo detectors and CCD in the integrated circuits.
With the above configuration, the semiconductor element can be formed which enables reduction in the element area. The semiconductor element can also be formed which can prevent degradation in characteristics while reducing the element area. Since the electrical measuring electrodes can be removed at the same time dicing process is executed, the number of production process can be reduced by eliminating an individual step of removing the electrical measuring electrodes.
According to a third aspect of the present invention, there is provided a semiconductor device on which a semiconductor element is mounted, comprising a semiconductor element including the above integrated circuit, wirings, and external connection terminals; and an encapsulation package having lead wirings connected electrically to the external connection terminals of the semiconductor element thereon, the semiconductor element being mounted in the encapsulation package. As explained above, it is preferable that the semiconductor element comprises the photo detectors and CCD in the integrated circuits. The external connection terminals of the semiconductor element are connected electrically to the lead wirings of the encapsulation package by direct contact or via wires. Further, it is preferable that the semiconductor element includes a photo detector and a CCD in the integrated circuit, and the encapsulation package includes a light transmission glass provided on the photo detector to transmit optical signals, and is made of a ceramic package with high moisture resistance.
With the above configuration, since the element area of the semiconductor element can be reduced as stated above, a size reduction of the encapsulation package can be implemented so that a size reduction of the semiconductor device can be achieved. In addition, the optical device can be provided which enables a size reduction.
Other and further objects and features of the present invention will become obvious upon an understanding of the illustrative embodiments about to be described in connection with the accompanying drawings or will be indicated in appended claims, and various advantages not referred to herein will occur to one skilled in the art upon employing of the invention in practice.